This invention relates generally to processing within a computing environment, and more particularly to computing systems having a multilevel cache hierarchy.
In computers, a cache is a component that improves performance by transparently storing data such that future requests for that data can be served faster. The data that is stored within a cache might be values that have been computed earlier or duplicates of original values that are stored elsewhere (e.g. main memory). If requested data is contained in the cache (cache hit), this request can be served by simply reading the cache, which is comparably faster. Otherwise (cache miss), the data has to be recomputed or fetched from its original storage location, which is comparably slower.
Cache operations in a shared cache may be performed by accessing a shared pipeline. A pipeline may be considered as a set of data processing elements connected in series, so that the output of one element is the input of the next one. An instruction pipeline may be used in a computing device to increase instruction throughput (the number of instructions that can be executed in a unit of time). The fundamental idea is to split the processing of a computer instruction into a series of independent steps, with storage at the end of each step. This allows the computer's control circuitry to issue instructions at the processing rate of the slowest step, which is much faster than the time needed to perform all steps at once. The term pipeline refers to the fact that each step is carrying data at once (like water), and each step is connected to the next (like the links of a pipe.)
In prior art systems that included multi-level caches, the highest level of the cache hierarchy served as both the point of coherency for the system and the source of data to be provided to lower level caches.